Hewlett-Packard researchers on Tuesday presented a new strategy that could dramatically improve chips used in the automotive, communications, and consumer electronics industries.
HP claims it has discovered a method to combine traditional complementary metal-oxide semiconductor (CMOS) technology with nanoscale devices in a hybrid circuit to increase transistor density, reduce power consumption, and dramatically improve tolerance to defects.
If the nanotech research bears out, it might help keep chipmakers on pace with what has come to be known as Moore's Law, the observation made in 1965 by Intel cofounder Gordon Moore that the number of transistors on chips will double every 18 to 24 months.
"As conventional chip electronics continue to shrink, Moore's Law is on a collision course with the laws of physics," said Stan Williams, director of quantum science research at HP Labs, in a statement. But the new technology, if HP's researchers have their way, might help avoid such a collision for many years to come.
Shrinking the Interconnect
According to HP, the research might be able to yield chips that are up to eight times denser and use less energy than chips being produced today. The chips could be built using the same sized transistors as those used in current chip design, which would allow them to be built in existing fabrication facilities with only minor adjustments to the lines, HP said.
The technology relies on a nanoscale switch structure layered on top of a CMOS layer and uses an architecture that HP Labs calls a "field programmable nanowire interconnect," or FPNI, which is a variation of the field programmable gate array (FPGA) technology commonly used in semiconductors today.
"This is a new architecture as well as a new interconnect scheme to reduce the amount of space used to connect transistors together," said Rob Lineback, senior analyst at research firm IC Insights. "If HP has come up with something that changes the rules of the game, it could have a significant impact for end users."
However, Lineback noted he is "always somewhat skeptical of these announcements."
Breaking Moore's Law
While HP researchers used simulation techniques to demonstrate the concept, the company is working on producing an actual chip. They said they plan have a prototype completed within the year.
The researchers, who presented what they called a "conservative" implementation that uses 15-nanometer wires combined with 45-nm CMOS, said the new technology could be viable by 2010. That would be equivalent to leaping ahead three processor generations without having to shrink the transistors, the researchers said.
The more computing power you put into a smaller space, the greater the capability of the device, be it a computer, an MP3 player, or a calculator. Increasing chip density in this way could result in new types of systems the market hasn't even thought of yet, IC Insights' Lineback said, while reducing the cost of existing systems and making them smaller and more portable.
"A chip that is eight times denser would reduce the amount of electrical power needed to drive systems, and allow new systems that have more advanced capabilities, like voice and vision recognition, which is not yet common or perfected," he noted. "With this much computing power, you could talk to your PC and it would rely on artificial intelligence to understand you."