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You are here: Home / Hardware / Inside HP's Nanotech Breakthrough
Inside HP's Nanotech Breakthrough
Inside HP's Nanotech Breakthrough
By David Garrett / CRM Daily Like this on Facebook Tweet this Link thison Linkedin Link this on Google Plus
On Tuesday, HP made an announcement that quickly moved beyond the tech press to ripple through the mainstream media: Researchers Greg Snider and Stan Williams demonstrated a technique that they claim could speed advancements in modern computing by a factor of seven or eight. Working at Palo Alto's famed HP Labs, the researchers merged traditional transistors with nanotechnology.

Transistors are integral parts of the chips that make up the brains of everything from the smallest cell phones to the largest mainframes. To make computers faster, researchers have long sought to reduce the size of transistors, shrinking them to pack more and more onto a chip.

Moore's Law, named after Intel cofounder Gordon Moore, says the number of transistors packed on a chip will double every two years. In 1965, when Moore first made the claim, there were fewer than 100 transistors on the average chip. Today, Intel chips boast billions.

But chipmakers have been racing against Moore's Law for decades, worried that one day they'll stop finding ways to shrink components. At one point, they have said, Moore's Law would crash into the laws of physics because transistors can only shrink so far.

Enter HP's Snider and Williams, and a new approach.

Space in Between

Rather than shrink transistors, Snider and Williams sought to shrink the space between transistors, the "interconnects" that link one transistor to the next. On many chips, that space accounts for 80 percent to 90 percent of the chip's real estate. Free it and you have more room for transistors at their current size.

And free that space is precisely what Snider and Williams propose to do. They suggest the use of nanowires -- tiny filaments smaller than 90 atoms in width -- that sit above the transistors, rather than on the same level.

HP's technique is called a "field programmable nanowire interconnect," or FPNI, and stems from a widely used technique known as "field programmable gate array," or FPGA, which does not use nanowires.

No chip using FPNI has been built as of yet, but HP has begun a prototype and expects its completion within a year.

Silicon Windfall?

HP's breakthrough is a big step for computing that could be a huge step for HP. Why? If the technology works as planned, HP, which long ago left the chipmaking business, could license its technique to fellow juggernauts like Intel and AMD, and see an enormous new revenue stream as a result.

Indeed, if future chips go the nanotech route and use FPNI or techniques that are based on it, HP might see a cut of any server, notebook, or cell phone that relies on it. "Essentially, every day would be Christmas for HP," said senior analyst Carmi Levy of the Info-Tech Research Group.

And that makes HP much like its sometimes friend and sometimes foe, Microsoft. "The major precedent for this in the PC era really is Microsoft with DOS," said Levy. "The vast majority of the computers sold in the last 30 years have been sold with a royalty payment to Microsoft for the fundamentals to the operating system."

Whether HP follows in Redmond's well-worn path is yet to be seen. But in time, it's pint-sized -- atom-sized -- breakthrough could be a gigantic boon to Palo Alto's bottom line.

Read more on: HP, Intel, AMD, Processors, Nanotech
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