Dear Visitor,

Our system has found that you are using an ad-blocking browser add-on.

We just wanted to let you know that our site content is, of course, available to you absolutely free of charge.

Our ads are the only way we have to be able to bring you the latest high-quality content, which is written by professional journalists, with the help of editors, graphic designers, and our site production and I.T. staff, as well as many other talented people who work around the clock for this site.

So, we ask you to add this site to your Ad Blocker’s "white list" or to simply disable your Ad Blocker while visiting this site.

Continue on this site freely
You are here: Home / Personal Tech / Intel, Micron Boost Memory Density
Intel, Micron Process Boosts Memory Chip Density
Intel, Micron Process Boosts Memory Chip Density
By Mark Long / CRM Daily Like this on Facebook Tweet this Link thison Linkedin Link this on Google Plus
Intel and Micron Technology have developed a new technology to expand the densities of the memory chips used in consumer storage devices such as flash cards and USB drives. Their joint-venture company, called IM Flash Technologies, has already begun sampling NAND memory chips capable of storing three bits of information per memory cell and it expects to begin mass-producing the devices in the fourth quarter.

A physical NAND array rated at 16GB has 16 billion cells in which information can be stored. However, IM Flash Technologies is now able to choose from among three different methods for storing data in each cell, according to Micron Strategic Marketing Director Kevin Kilbuck.

"With single-level cell, or SLC, the flash cell is storing one of two states -- a zero or a one logically, while multi-level cell, or MLC, means two bits per cell, while three bits per cell (3bpc) means" information is stored using "one of eight logic states," Kilbuck said. The advantage of 3bpc is that if "we take the same 16GB die and store three bits per cell, we would have a 48GB chip," Kilbuck said.

Thanks To Apple

The development of 3bpc technology comes at a time when global sales of NAND-type flash memory are expected to rise at a compound annual rate of 41 percent, reaching $932.5 million in 2013, said iSuppli Senior Analyst Michael Yang. "Soaring sales of smartphones, combined with the increasing density of NAND flash in each handset, is causing sales of the memory in this area to boom," Yang said.

The NAND flash makers can thank Apple's iPhone for injecting new life into the memory market, Yang observed. "Furthermore, Apple plans to introduce the iPhone in China, possibly early next year," which "will open up the market for the iPhone to a new potential audience of 1.3 billion people," he said.

However, Apple isn't the only handset manufacturer driving NAND growth. "With the introduction of a new generation of 'iPhone killers,' multiple smartphone makers now are helping to drive NAND demand," Yang said. "The more NAND in a smartphone, the more useful it becomes, able to store more songs and video clips, to hold more map data, and download more programs from an applications store."

Design Trade-Offs

The new technology from IM is capable of producing the industry's smallest and most cost-effective 32GB chip, according to Intel and Micron. They are best suited for use in USB flash drives and flash cards, where absolute cost and density are the most important design elements, Kilbuck said.

However, the deployment of 3bpc in memory devices involves trade-offs that make it less suitable for use in other memory applications, Kilbuck observed.

"Solid-state drives need a higher level of performance and endurance, and so they would use an SLC or an MLC technology," Kilbuck said. "With 3bpc you cannot read or write as many times as you can with SLC or MLC."

On the other hand, the relevance of 3bpc is expected to grow over time as chipmakers approach the limit of the performance gains achieved by moving to new process technologies that shrink the size of chips, Kilbuck said.

"We are approaching atomic dimensions in the cell, which means you are going to be able to literally count the number of atoms per memory cell on your fingers and toes some day," Kilbuck explained. "So it becomes more and more difficult to do a shrink every year. When that happens, 3bpc is going to become a critical piece of our NAND road map."

Tell Us What You Think


Like Us on FacebookFollow Us on Twitter
© Copyright 2018 NewsFactor Network. All rights reserved. Member of Accuserve Ad Network.