It's called Knights Landing and it's the most powerful version of Intel's Xeon Phi supercomputing chip. The processor is set to be available in commercial systems in the second half of 2015. It will ship along with Intel Omni Scale, a new interconnect fabric that will be integrated onto the chip and offer faster
Intel announced the updates to its Xeon Phi platform on Monday at the International Supercomputing Conference (ISC) 2014 conference in Leipzig, Germany.
The chipmaker said the new Xeon Phi chip can deliver peak performance of up to 3 teraflops with lower power consumption -- that's three times the performance of Knights Corner, the current Xeon Phi chip that has up to 61 cores and can deliver up to 1.2 teraflops of peak performance.
Solving Current, Future Problems
The new processor will be powered by more than 60 HPC-enhanced Silvermont architecture-based cores. And the integration with Omni Scale, along with the fabric's HPC-optimized architecture, aims to address the performance, scalability, reliability, power and density requirements of future HPC (high-performance computing) deployments.
"Intel is re-architecting the fundamental building block of HPC systems by integrating the Intel Omni Scale Fabric into Knights Landing, marking a significant inflection and milestone for the HPC industry," said Charles Wuischpard, vice president and general manager of Workstations and HPC at Intel.
Wuischpard said Knights Landing, which will support DDR4 memory technology, will remove the bottleneck created by memory-hogging applications. A standalone server processor, Knights Landing will be binary-compatible with Intel Xeon processors, allowing programmers to reuse existing code.
A Giant Step for Exascale
The platform design of the chip as well as it programming model and balanced performance make it the first viable step toward exascale computing, Wuischpard said. The first supercomputer to use Knights Landing will be "Cori," the National Energy Research Scientific Computing Center (NERSC)'s next-generation Cray XC system planned for 2016, serving more than 5,000 users and over 700 extreme-scale science projects.
Cori will consist of more than 9,300 Intel Knights Landing processors and will serve as an on-ramp to exascale for the NERSC's users through an accessible programming model. "Our codes, which are often memory-bandwidth limited, will also greatly benefit from Knights Landing's high speed on-package memory," said Sudip Dosanjh, NERSC director at Lawrence Berkeley National Laboratory. "We look forward to enabling new science that cannot be done on today's supercomputers."